The invention relates to a temperature-compensated semiconductor resistor. In particular, the invention relates to a semiconductor resistor which varies little with temperature in a temperature range of interest. In addition, the invention relates to a semiconductor integrated circuit in which such a semiconductor resistor is provided.
Electrical resistances can appear in various forms intentionally or unintentionally in semiconductor integrated circuits. In their unwanted form they constitute parasitic circuit elements having properties which must be estimated so that their negative effects can be minimized and countermeasures taken. If, however, semiconductor resistances are required for an electronic function, one must know their dimensions and electrical properties very precisely.
The classic form of a resistor integrated in a semiconductor circuit is a well resistor, i.e. a diffused or implanted p-region in a surrounding n-region. In standard CMOS circuits, such resistors are usually made of polycrystalline silicon with various characteristics. However, the disadvantage of typical CMOS resistors is that their resistance is highly temperature-dependent in the usual ambient temperature range. That can have detrimental effects on the performance of the semiconductor component, or lead to complete failure of the component.
It is accordingly an object of the invention to provide a temperature-compensated semiconductor resistor and a semiconductor integrated circuit having the semiconductor resistor, which overcome the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type and which have an improved temperature response, in particular with a reduced temperature dependence in a temperature range of interest.
With the foregoing and other objects in view there is provided, in accordance with the invention, a temperature-compensated semiconductor resistor, comprising two series-connected semiconductor resistance elements having mutually inverse resistive temperature responses or temperature-dependent resistance courses, in a temperature range of interest that is the normal ambient temperature during operation of the associated semiconductor circuit. Thus, within this range, one of the two resistance elements should have a positive temperature coefficient i.e. an electrical resistance that increases as the temperature rises, and the other one should have a negative temperature coefficient, i.e. an electrical resistance that decreases as the temperature rises.
A first connecting contact is disposed at one end of the semiconductor resistor, that is to say on the first of the two semiconductor resistance elements. The other connecting contact is located at the other end of the semiconductor resistor, that is to say on the second of the two semiconductor resistance elements. This results in a series circuit including the semiconductor resistance elements, and the total resistance of the semiconductor resistor equals the sum of the resistances of the two semiconductor resistance elements. The inverse resistive temperature responses of each of the resistance elements with respect to each other provide mutual compensation, so that the process of addition means that the resistive temperature characteristic of the semiconductor resistor is relatively flat.
In accordance with another feature of the invention, the semiconductor resistance elements are made of oppositely doped polycrystalline semiconductor material, in particular polycrystalline silicon. In crystalline silicon, the conductivity with respect to the temperature is determined by the decreasing mobility of the charge carriers with increasing temperature. However, in polycrystalline silicon, the charge transport mechanisms across the grain boundaries must be taken into account. One can thus obtain a negative or positive temperature coefficient depending on the charge state of the crystal defects making up a grain boundary. In experiments, one observes in p-doped, particularly p+-doped, polycrystalline silicon a resistance that increases with rising temperature, while in n-doped, particularly n+-doped, polycrystalline silicon a resistance that falls with rising temperature is observed. In the semiconductor resistor according to the invention, one can select different doping concentrations for hi the oppositely doped semiconductor resistance elements.
In accordance with a concomitant feature of the invention, if the semiconductor resistance elements are formed from n-doped and p-doped semiconductor regions, they are physically separated by a high-conductivity connecting layer. The connecting layer provides a low resistance electrical connection between the two semiconductor resistance elements. The connecting layer may be a metallic layer or possibly even a very highly doped semiconductor layer. However, the n-doped and p-doped semiconductor regions must not be directly adjacent, since that would create an unwanted p-n junction.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a temperature-compensated semiconductor resistor and a semiconductor integrated circuit having the semiconductor resistor, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.